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PRELIMINARY WHITE PAPER PMC-2000088 ISSUE 1
AAL1GATOR PRODUCT FAMILY
NETWORK CONVERGENCE OF VOICE, DATA AND VIDEO
NETWORK CONVERGENCE OF VOICE, DATA AND VIDEO
WHITE PAPER
PRELIMINARY ISSUE 1: JANUARY 2000
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PRELIMINARY WHITE PAPER PMC-2000088 ISSUE 1
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PUBLIC REVISION HISTORY Issue No. 1 Issue Date Jan 2000 Details of Change Document created.
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CONTENTS 1 2 CONVERGENCE OF VOICE, DATA AND VIDEO .....................................1 AAL1GATOR PRODUCT FAMILY OVERVIEW .........................................2 2.1 2.2 2.3 2.4 3 AAL1GATOR-I AND AAL1GATOR-II ..............................................3 AAL1GATOR-32 .............................................................................3 AAL1GATOR-8 AND AAL1GATOR-4 .............................................7 AAL1GATOR PRODUCT FAMILY COMPARISON..........................8
SYSTEM APPLICATIONS ......................................................................10 3.1 3.2 3.3 ATM MULTI-SERVICE SWITCH ...................................................10 DIGITAL ACCESS CROSS CONNECT (DACS)...........................11 INTEGRATED ACCESS DEVICE ................................................12
4 5
GLOSSARY ............................................................................................13 REFERENCES .......................................................................................15
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1
CONVERGENCE OF VOICE, DATA AND VIDEO Network infrastructures of telecommunications service providers are evolving, driven by the need for cost-effective deployment and management of new and existing services such as public and private telephony, leased line, Frame Relay and ATM. The carrier's separate voice, leased line and packet networks are transitioning from a large collection of different equipment including Narrowband, Broadband and Wideband Digital Cross Connects, ADMs, ATM and Frame Relay switches towards a single network of ATM Multi-service switches. The net result is twofold. Firstly, the convergence of voice, leased line and packet networks results in reduced total operating costs attributed to lower network management and overall equipment requirements. Secondly, carriers can capitalize on ATM's inherent capabilities of supporting multiple services, guaranteed QoS, bandwidth on demand, scaleability and reliability. As Digital Cross Connects are upgraded to support ATM or are replaced by ATM Multi-service switches, TDM traffic which includes voice, data and private leased line services must be circuit emulated across the ATM network. The ATM Forum has defined the Circuit Emulation Service (CES) Interoperability Specification to enable the transport of Constant Bit Rate (CBR) voice, data and leased line traffic over ATM networks using the ATM Adaptation Layer 1 (AAL1) protocol. The AAL1 protocol provides the ability to transfer constant bit rate traffic, timing information and structure information between source and destination. To achieve this AAL1 uses the ATM CBR service category and defines the information payload within each cell to support these capabilities. Circuit emulation is also used in next generation Customer Premise Equipment (CPE) and Customer Located Equipment (CLE) applications such as in Optical Network Units for ATM Passive Optical Networks (APON) and in Integrated Access Devices (IADs) where TDM traffic, for example from a PBX, is converted into ATM cells. This white paper describes how the transport of TDM traffic over ATM, compliant to CES and AAL1, is realized using the AAL1gator AAL1 Segmentation and Reassembly (SAR) processors from PMC-Sierra.
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AAL1GATOR PRODUCT FAMILY OVERVIEW The AAL1gator product family satisfies a wide range of system level requirements for enabling high density ATM CES/DBCES in Central Office applications and lower density CES/DBCES in CPE and CLE applications. The AAL1gator products are highly integrated and flexible monolithic single chip devices that provide DS1, E1, J1, DS3, E3, J2, STS-1 or STM-0 line interface access to an ATM Adaptation Layer 1 (AAL1) Constant Bit Rate (CBR) ATM network. The AAL1gator products enable a variety of circuit emulation services, ranging from structured DS1/E1/J1 for carrying voice traffic, unstructured DS1/E1/J2 for private line consolidation to unstructured DS3/E3/J2/STS-1/STM0. The AAL1gator product family comprises five products: AAL1gator-I, PM73121 AAL1gator-II, PM73122 AAL1gator-32, PM73123 AAL1gator-8 and PM73124 AAL1gator-4 as shown in Figure 1.
PM73122 AAL1gator-32 PM73122 AAL1gator-32 * 32 links with H-MVIP & SBI
* * * * * * * * * * * * *
32 links with H-MVIP & SBI 1024 V C s 1024 V C s 352 SBGA 352 SBGA SRTS + Adaptive Clock Recovery DBCES Supports DBCES 2.5V Core, 3.3V I/O 2.5V Core, 3.3V I/O 52 MHz UTOPIA L2, Any-PHY
(superceded by AAL1gator-II) * 8 links * 8 links * 256 V C s text * 240 V C s 256 PQFP * 240 PQFP * UTOPIA L1 * UTOPIA L1 *
AAL1gator-I WAC-021 AAL1gator
PM73121 AAL1gator-II WAC-121/PM73121 * 8 links
* 8 links * 256 V C s * 256 V C s text * 240 PQFP * 240 PQFP * 33 M H z UTOPIA L2 * 33 M H z UTOPIA L2 * Integrated SRTS * Integrated SRTS
* * * * * * *
PM73123 AAL1gator-8 PM73123 AAL1gator-8 8 links with H-MVIP support
* * * * * * *
8 links with H-MVIP support 256 V C s 256 V C s 324 PBGA 324 PBGA SRTS + Adaptive Clock Recovery text DBCES Supports DBCES 2.5V Core, 3.3V I/O 2.5V Core, 3.3V I/O 52 MHz UTOPIA L2, Any-PHY
First Generation AAL1gator
Second Generation AAL1gator
PM73124 AAL1gator-4 PM73124 AAL1gator-4 * 4 links with H-MVIP support
* * * * * * * * * * * * *
4 links with H-MVIP support 128 V C s 128 V C s 324 PBGA 324 PBGA SRTS + Adaptive Clock Recovery DBCES Supports DBCES 2.5V Core, 3.3V I/O 2.5V Core, 3.3V I/O 52 MHz UTOPIA L2, Any-PHY 52 MHz UTOPIA L2, Any-PHY
Third Generation AAL1gators
Figure 1. AAL1gator Product Family.
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2.1
AAL1gator-I and AAL1gator-II The AAL1gator-I and PM73121 AAL1gator-II, provide circuit emulation of eight T1/E1 links or a single DS3/E3 link over an ATM network. The AAL1gator-II is the second generation AAL1gator device and supercedes the AAL1gator-I with key enhancements such as increased UTOPIA L2 bandwidth from 25 MHz to 33 MHz and integrated SRTS timing recovery. For a complete list of enhancements see the AAL1gator-II datasheet. A typical T1/E1 channelized DS3 design using the AAL1gator-II is shown on the left side of Figure 2. The AAL1gator-II design comprises a DS3 Line Interface Unit (LIU), an M13 multiplexer such as PMC's PM8313 D3MX, 28 T1 Framers implemented as seven PMC PM4344 TQUADs and four AAL1gator-IIs. This design provides transport of 28 T1s over ATM. However, as carriers migrate more and more TDM traffic onto their ATM backbones, the demand for circuit emulation services is driving networking equipment architects to design next generation systems with: * * * higher link density for accommodating more TDM traffic per port card lower power per link Dynamic Bandwidth CES (DBCES) which reduces network bandwidth through intelligent suppression of ATM cell transmission when TDM links are idle. The freed up bandwidth from the idle channels can be used by other traffic classes such as Available Bit Rate (ABR) and Unspecified Bit Rate (UBR).
PMC-Sierra introduces the third generation AAL1gator products, PM73122 AAL1gator-32, PM73123 AAL1gator-8 and PM73124 AAL1gator-4 to address these new requirements. 2.2 AAL1gator-32 The AAL1gator-32 enables the design of low power, high density, DBCEScapable circuit emulation port cards for a wide range of network equipment including ATM Multi-service switches and Digital Cross Connects. The AAL1gator-32 in combination with the PM8315 TEMUX provides over four times the density as compared to previous channelized DS3 designs as illustrated in Figure 2.
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Figure 2. Channelized DS3 Design Comparing the AAL1gator-II with the AAL1gator-32 / TEMUX. The TEMUX integrates a DS3 Framer, M13 Multiplexer and 28 T1/E1 Framers. Each of the 28 clock, sync, signaling and data signals is communicated to the TM AAL1gator-32 across the Scalable Bandwidth Interconnect (SBI ) bus. The SBI bus is an 8-bit, 19.44 MHz time-division multiplexed bus capable of transferring both synchronous and asynchronous data up to OC-3 rates. Over the SBI bus, each of the 28 clock signals can be completely independent or common. The AAL1gator-32 provides AAL1 CES/DBCES processing for up to 32 DS1/E1 links; in this example 28 DS1 links are processed. Each DS1 link can be independently configured as either unstructured or structured, with or without CAS and with or without DBCES. On the ATM side of the AAL1gator-32 device, a UTOPIA / Any-PHY interface is used to interconnect to an ATM Physical Layer chip, Traffic Management device or other ATM component. The two-chip AAL1gator-32 / TEMUX design in Figure 2 replaces twelve individual components providing lower power per link, lower cost per link and a significant savings in board space. With the reduction in board space and power, the optimized AAL1gator-32 / TEMUX solution enables a new generation of high
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density circuit emulation port cards such as channelized OC-3 and OC-12 as shown in Figure 3 and Figure 4.
Figure 3. T1/E1 Channelized OC-3 Application. For the T1/E1 channelized OC-3 application shown in Figure 3 a PM5342 SPECTRA-155 provides SONET/SDH overhead processing at the OC-3 rate of 155.52 Mbps. The Telecom Bus which is an 8-bit parallel bus running at 19.44 MHz interface is used to directly interface the SPECTRA-155 to the TEMUX. The TEMUX provides a VT/TU Mapper in addition to the DS3 Framer, M13 Multiplexer and T1/E1 Framers. In this example three TEMUXs, configured in VT mapper mode, and three AAL1gator-32s share a common SBI bus to support 84 T1 links. In this example, the ATM side of each AAL1gator-32 is configured for either UTOPIA Level 2 or Any-PHY for interconnecting to the PM7326 S/UNI-APEX ATM Traffic Manager and Switch device. The PM7324 S/UNI-ATLAS performs policing and address translation functions. With the densities afforded by the AAL1gator-32 and TEMUX devices a single port card can provide an OC-12 worth of T1 links (336 T1 links) as shown in Figure 4. In this example the PM5313 SPECTRA-622 provides SONET/SDH overhead processing at the OC-12 rate of 622 Mbps. As the Telecom and SBI Buses support OC-3 rates, separate buses are required to interconnect each of four groups of three TEMUX and AAL1gator-32 devices.
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Figure 4. T1/E1 Channelized OC-12 Application.
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In addition to providing high link density, the AAL1gator-32 provides significantly lower power per link than previous solutions. 2.3 AAL1gator-8 and AAL1gator-4 The other two new members of the AAL1gator family, the AAL1gator-8 and AAL1gator-4, address CPE and CLE applications where support for a small number of links is required. The AAL1gator-8 and AAL1gator-4 provide low power, DBCES-capable, eight and four link circuit emulation, respectively, for applications such as Integrated Access Devices (IADs), ATM Multi-service Access Switches, Optical Networking Units and base stations in wireless networks. Like the AAL1gator-II, the AAL1gator-8 provides circuit emulation of eight DS1/E1 links or a single DS3/E3 link; key enhancements provided by the AAL1gator-8 over the AAL1gator-II include: * * * * * * * * * * Lower power: AAL1gator-8 has 2.5V with 3.3V, 5V tolerant I/O DBCES support Both SRTS and Adaptive Clock recovery modes are supported internally for T1/E1 rates Robust Sequence Number Processing Increased UTOPIA L2 bandwidth from 33 MHz to 52 MHz with parity support UTOPIA loopback support Support for 2 H-MVIP lines Support for unstructured STS-1/STM-0 over ATM The RAM interface is now decoupled from the microprocessor interface for ease of system design Improved OAM cell processing, interrupt processing and DS3 AIS support
The AAL1gator-4 is pin-compatible with the AAL1gator-8 with support for four DS1/E1 links or a single DS3 /E3 link. The AAL1gator-4 is targeted for low link applications such as Optical Networking Units and base stations in wireless networks.
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2.4
AAL1gator Product Family Comparison Table 1 compares the features of the AAL1gator product family (features are described in later sections of the document). Note that the AAL1gator-32, AAL1gator-8 and AAL1gator-4 are recommended for new designs over the AAL1gator-II.
Feature VCs Supported DBCES Internal SRTS & Adaptive Clock Timing Recovery Sequence Number Processing Line Interface SBI Mode DS1/E1 DS3 DS3 & 16 DS1/E1 Support H-MVIP Mode TX / RX Lines DS1/E1 High Speed Mode
(AAL1gator-32)
AAL1gator-32 1024 Yes Yes
AAL1gator-8 256 Yes Yes
AAL1gator-4 128 Yes Yes
AAL1gator-II 256 No SRTS only
Fast and Robust
Fast and Robust
Fast and Robust
Fast
32 2 Yes
N/A N/A No
N/A N/A No
N/A N/A No
8/8 32
2/2 8
1/ 1 4
N/A N/A
DS3/E3 STS-1/STM-0 Direct Low Speed Mode
(AAL1gator-32)
2 2
See Direct Mode See Direct Mode
See Direct Mode See Direct Mode
See Direct Mode See Direct Mode
DS1/E1 MVIP-90 Unstructured J2 Direct Mode (AAL1gator-8
and AAL1gator-4)
16 16 6
See Direct Mode See Direct Mode See Direct Mode
See Direct Mode See Direct Mode See Direct Mode
See Direct Mode See Direct Mode See Direct Mode
DS3/E3 STS-1/STM-0 DS1/E1
See High Speed Mode See High Speed Mode See High Speed Mode
1 1 8
1 1 4
1 1 8
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MVIP-90 Unstructured J2 System Side Loopback UTOPIA Interface UTOPIA L2
See High Speed Mode See High Speed Mode
8 3 Yes
4 3 Yes
N/A N/A No
Yes
52 MHz 16-bit with parity / Any-PHY Option to respond as a 4-port device.
52 MHz 16bit with parity / Any-PHY Responds as a single port device only.
52 MHz 16-bit with parity / Any-PHY Responds as a single port device only.
33 MHz
General RAM Two 256k x 16 (18) 10 ns Synchronous SRAM or ZBT RAM 2.5V core 3.3V I/O 1.7W typical 2.3W max:
* * 0.5W (3.3V) 1.8W (2.5V)
One 128k x 16 (18) 10 ns Synchronous SRAM or ZBT RAM 2.5V core 3.3V I/O 0.75W typical 1W max:
* * 0.4W (3.3V) 0.6W (2.5V)
One 128k x 16 (18) 10 ns Synchronous SRAM or ZBT RAM 2.5V core 3.3V I/O 0.75W typical 1W max:
* * 0.4W (3.3V) 0.6W (2.5V)
128kx 16 SRAM
Supply Voltage Power, Typical, Max
5V 2.15W typical 2.53W max
Package Type & Size
352 SBGA (35mm x 35mm)
324 PBGA (23 mm x 23mm)
324 PBGA (23 mm x 23mm)
240 PQFP (32mm x 32mm)
Table 1. AAL1gator Product Family Comparison.
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SYSTEM APPLICATIONS The AAL1gator products have been optimized for various applications. The high link density of the AAL1gator-32 makes it ideal for Central Office applications such as ATM Multi-service Switches, DACS and Optical Line Termination units for ATM Passive Optical Networks (APON). Using the AAL1gator-8 and AAL1gator-4 with T1/E1 framers and integrated LIUs such as the PM4351 COMET, enables ATM transport of up to 8 and 4 T1/E1 circuits, respectively, for applications such as Integrated Access Devices (IADs), ATM Multi-service Access Switches, Optical Networking Units and base stations in wireless networks. Table 2 summarizes the various system applications where the AAL1gator devices are used.
AAL1gator Application ATM Multi-service Switch DACS with an ATM Interface Access Service Concentrator Unstructured DS3/E3/STS-1/STM-0 over ATM Optical Line Termination (OLT) Unit in an ATM Passive Optical Network (APON) Integrated Access Device (IAD), PBX Optical Network Unit (ONU) in APON LMDS
AAL1gator-32
AAL1gator-8
AAL1gator-4

Table 2. AAL1gator System Applications. 3.1 ATM Multi-service Switch An ATM Multi-service Switch is typically located at the edge of the wide area network. It interfaces to Frame Relay, ATM as well as TDM services and consolidates these different services to ATM cells for transport over a single highbandwidth ATM core network. Figure 5 shows a reference design that uses PMC's SPECTRA-155, TEMUX, FREEDM-84A672 and AAL1gator-32 in a multi-service port adapter design that supports channelized DS3 and channelized OC-3 densities.
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DS3 LIU
PM8315 TEMUX SBI Bus
PM7385 FREEDM-84A672
Frame Relay to ATM Interworking Functions
UTOPIA / Any-PHY Bus
PM5342 SPECTRA-155
PM8315 TEMUX
Cell Delineation and ATM Inverse Mux Functions
Telecom Bus
PM8315 TEMUX
PM73122 AAL1gator-32 AAL1gator-32
DS3/E3/J2 LIU DS3/E3/J2 LIU
PM7346 S/UNI-QJET
PM73122 AAL1gator-32
Unstructured DS3/E3/J2 CES
Figure 5. Multi-service Switch Application 3.2 Digital Access Cross Connect (DACS) Narrowband, wideband or broadband Digital Access Cross Connects (DACS) that need to support ATM uplink interfaces to a core ATM switch can use one or more AAL1gator-32s to emulate a TDM service over an ATM network. DACs with CES capabilities allow service providers to consolidate legacy private line services onto a high speed ATM backbone network and reduce the number of network elements and physical connections that need to be managed. Figure 6 shows the AAL1gator-32 in a DACS application.
UTOPIA / Any-PHY UTOPIA L2
H-MVIP
H-MVIP
PM73122 AAL1gator-32
DS3 LIU
PM8315 TEMUX
TDM Switch PM73122 AAL1gator-32
PM7326 S/UNI-APEX
PM5349 S/UNI-QUAD
Cell FIFO
Figure 6. Using the AAL1gator-32 in a DACS application.
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3.3
Integrated Access Device An Integrated Access Device (IAD) consolidates voice, data, Internet, and video wide-area network services using ATM over shared T1/E1 lines. IADs can also unify the functions of many different types of equipment including CSUs, DSUs and multiplexers. Figure 7 shows the AAL1gator-4 connected to four PM4351 COMETs, a PM7326 S/UNI-APEX Traffic Manager, an Inverse Multiplexing over ATM device, the PM7344 S/UNI-MPH and eight PM4351 COMETs for the WAN uplink.
ATM Traffic Management
UTOPIA / Any-PHY UTOPIA
Service Adaptation
ATM PHY with IMA
T1/E1 x 4
To PBX, etc.
PM4351 P M M3 5T x 8 CO4 E 1 COMET x 4
PM73124 AAL1gator-4
PM7326 S/UNI-APEX
Inverse Multiplexing over ATM
To router, etc.
Packet Processor
AAL5 SAR
Cell FIFO
PP M 7 3 4 4 M7344 SSUU N-IMM P H / / NI - PH
PM4351 C4 M 1 P M O3 5E T x 4 COMET x 8
T1/E1 x 8
ATM IMA
Figure 7. Using the AAL1gator-4 in an Integrated Access Device (IAD) Application.
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GLOSSARY
A32/A8/A4 AIS CAS CCS CES CPE CLE DBCES DS0 DS1 DS3 E1 AAL1gator-32 / AAL1gator-8 / AAL1gator-4 Alarm Indication Signal Channel Associated Signaling Common Channel Signaling Circuit Emulation Service Customer Premise Equipment Customer Located Equipment Dynamic Bandwidth Circuit Emulation Service Digital Service, level 0: There are 24 DS0 channels in a DS1. Each DS0 channel has a bandwidth of 64 Kbps full duplex. Digital Service, level 1. 1.544 Mbps Digital Service, level 3. 44.736 Mbps E1 carries information at the transmission rate of 2 Mbps. This is the rate used by European CEPT carriers to transmit 30, 64 Kbps digital channels for voice or data calls, plus a 64 Kbps channel for signaling and a 64 Kbps channel for framing. E3 carries information at the transmission rate of 34.368 Mbps. This is the rate used by CEPT to transmit 512 simultaneous voice conversations. High Speed Multi-Vendor Integration Protocol: A synchronous time division multiplexed bus of Nx64 Kbps constant bit rate data stream. The H-MVIP standards are defined by the GO-MVIP organization. International Standards Organization: An international standards-setting organization. The Japanese version of the T Carrier system of North America. 6.312 Mbps used to carry 96 voice channels. Line Interface Unit Metropolitan Area Network: A term used to describe a data network covering an area larger than a local area network, but less than a wide area network. A MAN may carry voice, video and multimedia data. Management Information Base Operations, Administration and Maintenance Optical Carrier 12. SONET channel of 622.08 Mbps. Optical Carrier 3. A SONET channel that has a bandwidth of 155.52 Mbps
E3 H-MVIP
ISO J2 LIU MAN
MIB OAM OC-12 OC-3
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OSI
Open Systems Interconnect: A standard that defines seven independent layers of communication protocols. Each layer enhances the communication services of the layer just below it and shields the layer above it from the implementation details of the lower layer. Scaleable Bandwidth Interconnect: A synchronous, time-division multiplexed bus designed to transfer, in a pin-efficient manner, data belonging to a number of independently timed links. Synchronous Digital Hierarchy: A set of standard fiber-optic transmission standards used outside North America. Synchronous Optical NETwork: A family of fiber optic transmission standards used in North America. Synchronous Payload Envelope Synchronous Residual Timestamp Timing Recovery Synchronous Transport Module - 0 Synchronous Transport Signal Level 1. Basic transmission rate used in SONET - equivalent to 51.84 Mbps. Trunk Level 1: A digital transmission link with a total signaling speed of 1.544 Mbps. Time-Slot Interchanger Universal Test and Operations Interface: Refers to an electrical interface between the TC and PMD sublayers of the physical layer. UTOPIA is the interface for devices connecting to an ATM network. Virtual Tributary: A structure designed for transport and switching of sub-DS3 payloads. A unit of sub-SONET bandwidth that can be combined or concatenated, for transmission through the network. VT1.5 is equivalent to 1.544 Mbps and VT2 equals 2.048 Mbps Wide Area Network: A data network that is used to interconnect remote LANs or users over leased lines, packet or cell switch services
SBI
SDH SONET SPE SRTS STM-0 STS-1 T1 TSI UTOPIA
VT
WAN
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REFERENCES 1. Circuit Emulation Service Interoperability Specification Version 2.0. AFVTOA-0078. January 1997. 2. Specifications of (DBCES) Dynamic Bandwidth Utilization in 64 kbps Time Slot Trunking over ATM Using CES. AF-VTOA-0085. July 1997. 3. ATM Forum, UTOPIA, an ATM-PHY Layer Specification, Level 1, V. 2.01, Foster City, CA USA, March 1994. 4. ATM Forum, UTOPIA, an ATM-PHY Layer Specification, Level 2, V. 1.0, Foster City, CA USA, June 1995. 5. H-MVIP Standard Release 1.1. GO_MVIP .
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CONTACTING PMC-SIERRA, INC. PMC-Sierra, Inc. 105-8555 Baxter Place Burnaby, BC Canada V5A 4V7 Tel: Fax: (604) 415-6000 (604) 415-6200 document@pmc-sierra.com info@pmc-sierra.com apps@pmc-sierra.com (604) 415-4533 http://www.pmc-sierra.com
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None of the information contained in this document constitutes an express or implied warranty by PMC-Sierra, Inc. as to the sufficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not limited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. In no event will PMC-Sierra, Inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not PMC-Sierra, Inc. has been advised of the possibility of such damage. (c) 2000 PMC-Sierra, Inc. PMC-2000088 (R1) Issue date: January 2000
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